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Ultrathin (sub-2 nm) Al₂O₃/MgO memristors were recently developed using anin vacuoatomic layer deposition (ALD) process that minimizes unintended defects and prevents undesirable leakage current. These memristors provide a unique platform that allows oxygen vacancies (V_O) to be inserted into the memristor with atomic precision and study how this affects the formation and rupture of conductive filaments (CFs) during memristive switching. Herein, we present a systematic study on three sets of ultrathin Al₂O₃/MgO memristors with V_O-doping via modular MgO atomic layer insertion into an otherwise pristine insulating Al₂O₃atomic layer stack (ALS) using anin vacuoALD. At a fixed memristor thickness of 17 Al₂O₃/MgO atomic layers (∼1.9 nm), the properties of the memristors were found to be affected by the number and stacking pattern of the MgO atomic layers in the Al₂O₃/MgO ALS. Importantly, the trend of reduced low-state resistance and the increasing appearance of multi-step switches with an increasing number of MgO atomic layers suggests a direct correlation between the dimension and dynamic evolution of the conducting filaments and the V_Oconcentration and distribution. Understanding such a correlation is critical to an atomic-scale control of the switching behavior of ultrathin memristors.

Continuous device downsizing and circuit complexity have motivated atomic-scale tuning of memristors. Herein, we report atomically tunable Pd/M1/M2/Al ultrathin (<2.5 nm M1/M2 bilayer oxide thickness) memristors using in vacuo atomic layer deposition by controlled insertion of MgO atomic layers into pristine Al₂O₃atomic layer stacks guided by theory predicted Fermi energy lowering leading to a higher high state resistance (HRS) and a reduction of oxygen vacancy formation energy. Excitingly, memristors with HRS and on/off ratio increasing exponentially with M1/M2 thickness in the range 1.2–2.4 nm have been obtained, illustrating tunneling mechanism and tunable on/off ratio in the range of 10–104. Further dynamic tunability of on/off ratio by electric field is possible by designing of the atomic M2 layer and M1/M2 interface. This result probes ways in the design of memristors with atomically tunable performance parameters.